Circuit formation by etching of copper or copper alloy layers is a standard manufacturing step in production of printed circuit boards, IC substrates and related devices.
A negative pattern of the circuit is formed by a) applying an etch resist, e.g., a polymeric dry film resist or a metal resist on a layer of copper, b) etching away those portions of copper not covered by the etch resist and c) remove the etch resist from the remaining copper circuit.
Etching solutions applied for this task are selected from different types of compositions such as mixtures of an oxidizing agent and an acid. Two main types of etching solutions are based on an acid such as sulphuric acid or hydrochloric acid and contain as the oxidizing agent either hydrogen peroxide or Fe3+ ions added as FeCl3. Such etching solutions are disclosed in C. F. Coombs, Jr., “Printed Circuits Handbook”, 5th Ed. 2001, Chapter 33.4.3, pages 33.14 to 33.15 and Chapter 33.4.5, pages 33.17.
The ongoing miniaturization of circuits in terms of line width/interline-space values and thickness of the copper layers to be etched does not allow to using conventional etching solutions such as the ones described above.
The disadvantage of known etching solutions is even more present if the copper tracks are manufactured by a semi additive process (SAP). Here the bare dielectric substrate is first coated with a seed layer serving as an electrically conductive layer. The seed layer comprises for example copper deposited by electroless plating. Next, a patterned resist layer is formed on the seed layer and a thicker, second copper layer is deposited by electroplating into the openings of the patterned resist layer onto the seed layer. The patterned resist layer is stripped and the seed layer in between copper tracks deposited by electroplating needs to be removed by a differential etch step. The seed layer deposited by electroless plating has a finer grain structure than the second copper layer deposited by electroplating. The different grain structures can lead to a different etching behaviour of the individual copper layers.
A similar situation is present when copper tracks are manufactured by a modified semiadditive process (m-SAP) wherein a thick, second copper layer is deposited in the openings of the patterned resist layer onto a first thin layer of copper. The first copper layer is manufactured, e.g. by thinning a copper clad attached to the dielectric substrate. Again, both first and second copper layer have a different grain structure.
The etching solution applied for the differential etching step should only remove the first copper layer in between the copper tracks while not attacking the sidewalls and the top of the copper tracks deposited by electroplating and the underlying first copper layer or copper seed layer.
Etching solutions based on sulfuric acid and hydrogen peroxide lead to an undesired undercutting of the first copper layer during etching (FIG. 1) which results in an insufficient adhesion of the copper layer on the dielectric substrate.
Etching solutions based on sulfuric acid and Fe3+ ions typically show an etching behaviour as shown in FIG. 2. The broader base of the etched copper line can lead to circuit shorts which are not acceptable.